Charge-coupled Devices Por Speech Transform Coding
نویسندگان
چکیده
This paper describes t he design and performance o f c h i r p c o r r e l a t o r s used i n a f e a s i b i l i t y study o f speech t r a n s f o r m coding. Two chips have been evaluated, a 50-point Block CZT processor and a 100-point s l i d i n g CZT processor. The r e l a t i v e m e r i t s of the two systems are compared i n the context of data-compression o f speech s i g n a l s using a n a l y s i s / synthesis coding techniques. P a r t i c u l a r emphasis i s placed on^ a l t e r n a t i v e methods o f o b t a i n i n g ±00% duty c y c l e , on m u l t i p l e x i n g the Block CZT processor, and on e s t a b l i s h i n g the f e a s i b i l i t y of the inverse s l i d i n g CZT.
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